## 17CS32 Analog and Digital Electronics Module 2

The important question from module 2 of Analog and Digital Electronics along with answers. Download module 2 question and answers 17CS32 Analog and Digital Electronics CBCS Notes.

1. What is Gate? State and prove De Morgan’s theorems.

2. Differentiate between analog and digitals signal.

3. Define (i) rise time (ii)fall time (iii)period (iv) frequency (v) duty cycle of a digital signal.

4. (i) Prove that the duty cycle of a symmetrical waveform is 50%. (ii) What is the value of high duty cycle (duty cycle H) if the frequency of a digital waveform is 5 MHz and the width of the positive pulse is 0.05 μs? (iii) An asymmetrical signal waveform is high for 2ms and low for 3ms. Find Frequency, Period, Duty cycle low, Duty cycle high.

5. Describe positive logic and negative logic. List the equivalences in positive and negative logic.

6. Prove that (a) “Positive OR” logic is equal to “Negative AND” logic (b) “Positive AND” logic is equal to “Negative OR” logic (c) “Positive NOR” logic is equal to “Negative NAND” logic (d) “Positive NAND” logic is equal to “Negative NOR” logic.

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7. What is a universal gate? List the universal gates and prove their universalities.

8. Realize the XOR gate using (i) NAND gate (ii) NOR gate.

##### 9. Define canonical Minterm form and canonical Maxterm form.

10. Express the function F=x+yz as the sum of its minterms and product of maxterms.

11. Express the function F=(x+yz) ´ as the sum of its minterms and product of maxterms.

12. Convert the following 3-variable SOP to POS form. (i) Σm(3,5,6,7) (ii) Σm(0,2,5,6).

13. Convert the following 4-variable POS to SOP form. (i) ΠM(1,3,4,7) (ii) ΠM(0,1,2,4,10,13,15).

14. Find the minimal SOP and minimal POS of the following Boolean function using K-Map.

f(a, b, c, d) = Σm(6,7,9,10,13) + d(1,4,5,11)

15. Reduce the following Boolean function using K-Map and realize the simplified expression
using NAND gates. f(a, b, c, d) = Σm(1,3,4,5,13,15) + d(8,9,10,11)

16. Simplify the following expressions using Karnaugh map. Implement the simplified circuit using the gates as indicated:

(i) f(a, b, c, d) = Σm(1,5,7,9,10,13,15) + d(8,11,14) using NAND gates.

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(ii) f(a, b, c, d) = ΠM(0,1,2,4,5,6,8,9,12,13,14) using NOR gates.

17. What are static hazards? How to design a hazard-free circuit? Explain with an example.